%0 Journal Article %1 journals/tcad/Gannett90 %A Gannett, Joel W. %D 1990 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 6 %P 669-674 %T SHORTFINDER: a graphical CAD tool for locating net-to-net shorts in VLSI chip layouts. %U http://dblp.uni-trier.de/db/journals/tcad/tcad9.html#Gannett90 %V 9

@article{journals/tcad/Gannett90, added-at = {2020-09-24T00:00:00.000+0200}, author = {Gannett, Joel W.}, biburl = {https://www.bibsonomy.org/bibtex/2e80347af7e74966c04f71b3a7b895c86/dblp}, ee = {https://doi.org/10.1109/43.55197}, interhash = {77c77adbeda538ec8a7af8f002114f77}, intrahash = {e80347af7e74966c04f71b3a7b895c86}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 6, pages = {669-674}, timestamp = {2020-09-25T11:49:28.000+0200}, title = {SHORTFINDER: a graphical CAD tool for locating net-to-net shorts in VLSI chip layouts.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad9.html#Gannett90}, volume = 9, year = 1990 }