%0 Conference Paper %1 conf/hpec/CaldwellMBT16 %A Caldwell, Jeffrey %A Marr, Bo %A Bloom, David %A Thompson, Dan %B HPEC %D 2016 %I IEEE %K dblp %P 1-6 %T Optimizing simulation speed of FPGA model-based synthesis. %U http://dblp.uni-trier.de/db/conf/hpec/hpec2016.html#CaldwellMBT16 %@ 978-1-5090-3525-0

@inproceedings{conf/hpec/CaldwellMBT16, added-at = {2016-12-07T00:00:00.000+0100}, author = {Caldwell, Jeffrey and Marr, Bo and Bloom, David and Thompson, Dan}, biburl = {https://www.bibsonomy.org/bibtex/233b3350ad1ce770810727786a1f5bad6/dblp}, booktitle = {HPEC}, crossref = {conf/hpec/2016}, ee = {http://dx.doi.org/10.1109/HPEC.2016.7761627}, interhash = {7bb49fcb11a908c1c96b6132d72657aa}, intrahash = {33b3350ad1ce770810727786a1f5bad6}, isbn = {978-1-5090-3525-0}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2016-12-08T11:38:52.000+0100}, title = {Optimizing simulation speed of FPGA model-based synthesis.}, url = {http://dblp.uni-trier.de/db/conf/hpec/hpec2016.html#CaldwellMBT16}, year = 2016 }