%0 Conference Paper %1 conf/vlsid/BoseAA93 %A Bose, Soumitra %A Agrawal, Prathima %A Agrawal, Vishwani D. %B VLSI Design %D 1993 %I IEEE Computer Society %K dblp %P 269-274 %T A Path Delay Fault Simulator for Sequential Circuits. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#BoseAA93 %@ 0-8186-3180-5

@inproceedings{conf/vlsid/BoseAA93, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bose, Soumitra and Agrawal, Prathima and Agrawal, Vishwani D.}, biburl = {https://www.bibsonomy.org/bibtex/22d78f332ebe4dc2d9c15f9461df6d0a0/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1993}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1993.669695}, interhash = {7f872684ac560d3b4d606150a53aa2c1}, intrahash = {2d78f332ebe4dc2d9c15f9461df6d0a0}, isbn = {0-8186-3180-5}, keywords = {dblp}, pages = {269-274}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:46:57.000+0200}, title = {A Path Delay Fault Simulator for Sequential Circuits.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1993.html#BoseAA93}, year = 1993 }