%0 Conference Paper %1 conf/vlsid/PomeranzR08a %A Pomeranz, Irith %A Reddy, Sudhakar M. %B VLSI Design %D 2008 %I IEEE Computer Society %K dblp %P 181-186 %T Design-for-Testability for Synchronous Sequential Circuits that Maintains Functional Switching Activity. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2008.html#PomeranzR08a %@ 0-7695-3083-4

@inproceedings{conf/vlsid/PomeranzR08a, added-at = {2023-03-24T00:00:00.000+0100}, author = {Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/272ca12ddef04fdaa5291f435cde59e35/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2008}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.2008.17}, interhash = {806ed3f124dbdd450ab0b8387629fe76}, intrahash = {72ca12ddef04fdaa5291f435cde59e35}, isbn = {0-7695-3083-4}, keywords = {dblp}, pages = {181-186}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:22.000+0200}, title = {Design-for-Testability for Synchronous Sequential Circuits that Maintains Functional Switching Activity.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2008.html#PomeranzR08a}, year = 2008 }