%0 Conference Paper %1 conf/fpga/JeffersonRLNCMZMC98 %A Jefferson, David %A Reddy, Srinivas %A Lane, Christopher %A Ngo, Ninh %A Chang, Wanli %A Mijia, Manuel %A Zaveri, Ketan %A McClintock, Cameron %A Cliff, Richard %B FPGA %D 1998 %E Cong, Jason %E Kaptanoglu, Sinan %I ACM %K dblp %P 256 %T A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract). %U http://dblp.uni-trier.de/db/conf/fpga/fpga98.html#JeffersonRLNCMZMC98 %@ 0-89791-978-5

@inproceedings{conf/fpga/JeffersonRLNCMZMC98, added-at = {2017-02-02T00:00:00.000+0100}, author = {Jefferson, David and Reddy, Srinivas and Lane, Christopher and Ngo, Ninh and Chang, Wanli and Mijia, Manuel and Zaveri, Ketan and McClintock, Cameron and Cliff, Richard}, biburl = {https://www.bibsonomy.org/bibtex/22d705a63e41681f00500189d6dc4c423/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/1998}, editor = {Cong, Jason and Kaptanoglu, Sinan}, ee = {http://doi.acm.org/10.1145/275107.275148}, interhash = {868c4f2f021b4b969d5a60be22021533}, intrahash = {2d705a63e41681f00500189d6dc4c423}, isbn = {0-89791-978-5}, keywords = {dblp}, pages = 256, publisher = {ACM}, timestamp = {2017-02-03T11:35:13.000+0100}, title = {A 100 MHz PLL Implemented on a 100K Gate Programmable Logic Device (Abstract).}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga98.html#JeffersonRLNCMZMC98}, year = 1998 }