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%0 Journal Article
%1 journals/tvlsi/CavalcanteSZSB20
%A Cavalcante, Matheus A.
%A Schuiki, Fabian
%A Zaruba, Florian
%A Schaffner, Michael
%A Benini, Luca
%D 2020
%J IEEE Trans. Very Large Scale Integr. Syst.
%K dblp
%N 2
%P 530-543
%T Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI.
%U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi28.html#CavalcanteSZSB20
%V 28
@article{journals/tvlsi/CavalcanteSZSB20,
added-at = {2020-03-11T00:00:00.000+0100},
author = {Cavalcante, Matheus A. and Schuiki, Fabian and Zaruba, Florian and Schaffner, Michael and Benini, Luca},
biburl = {https://www.bibsonomy.org/bibtex/2cc2644ee5574581c97c684b85d03e64d/dblp},
ee = {https://doi.org/10.1109/TVLSI.2019.2950087},
interhash = {8e0399863312e2728d87d7686e693ea0},
intrahash = {cc2644ee5574581c97c684b85d03e64d},
journal = {IEEE Trans. Very Large Scale Integr. Syst.},
keywords = {dblp},
number = 2,
pages = {530-543},
timestamp = {2020-03-12T11:41:44.000+0100},
title = {Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI.},
url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi28.html#CavalcanteSZSB20},
volume = 28,
year = 2020
}
