Article,

Optimization of Technological Process to Decrease Dimensions of Circuits XOR, Manufectured Based on Field-Effect Heterotransistors

, and .
International Journal on Foundations of Computer Science & Technology (IJFCST), 6 (1): 20 (January 2016)
DOI: 10.5121/ijfcst.2016.6101

Abstract

The paper describes an approach of increasing of integration rate of elements of integrated circuits. The approach has been illustrated by example of manufacturing of a circuit XOR. Framework the approach one should manufacture a heterostructure with specific configuration. After that several special areas of the heterostructure should be doped by diffusion and/or ion implantation and optimization of annealing of dopant and/or radiation defects. We analyzed redistribution of dopant with account redistribution of radiation defects to formulate recommendations to decrease dimensions of integrated circuits by using analytical approaches of modeling of technological process.

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