%0 Conference Paper %1 conf/date/ShafaeiP16 %A Shafaei, Alireza %A Pedram, Massoud %B DATE %D 2016 %E Fanucci, Luca %E Teich, Jürgen %I IEEE %K dblp %P 457-462 %T Energy-efficient cache memories using a dual-Vt 4T SRAM cell with read-assist techniques. %U http://dblp.uni-trier.de/db/conf/date/date2016.html#ShafaeiP16 %@ 978-3-9815-3707-9

@inproceedings{conf/date/ShafaeiP16, added-at = {2021-08-09T00:00:00.000+0200}, author = {Shafaei, Alireza and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/26c97996daece2c2c96c3d089d4469bef/dblp}, booktitle = {DATE}, crossref = {conf/date/2016}, editor = {Fanucci, Luca and Teich, Jürgen}, ee = {https://ieeexplore.ieee.org/document/7459354/}, interhash = {97d84f3259cad60470b64785878b3949}, intrahash = {6c97996daece2c2c96c3d089d4469bef}, isbn = {978-3-9815-3707-9}, keywords = {dblp}, pages = {457-462}, publisher = {IEEE}, timestamp = {2024-04-10T06:47:58.000+0200}, title = {Energy-efficient cache memories using a dual-Vt 4T SRAM cell with read-assist techniques.}, url = {http://dblp.uni-trier.de/db/conf/date/date2016.html#ShafaeiP16}, year = 2016 }