In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL.
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%0 Journal Article
%1 journals/jpdc/MeyerKP22
%A Meyer, Marius
%A Kenter, Tobias
%A Plessl, Christian
%D 2022
%J J. Parallel Distributed Comput.
%K dblp
%P 79-89
%T In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL.
%U http://dblp.uni-trier.de/db/journals/jpdc/jpdc160.html#MeyerKP22
%V 160
@article{journals/jpdc/MeyerKP22,
added-at = {2023-08-28T00:00:00.000+0200},
author = {Meyer, Marius and Kenter, Tobias and Plessl, Christian},
biburl = {https://www.bibsonomy.org/bibtex/223759cae51df6d6716b9ce2a35007eb3/dblp},
ee = {https://www.wikidata.org/entity/Q114155157},
interhash = {987978c2777c719d3c7a47e9a6490ea5},
intrahash = {23759cae51df6d6716b9ce2a35007eb3},
journal = {J. Parallel Distributed Comput.},
keywords = {dblp},
pages = {79-89},
timestamp = {2024-04-08T19:01:26.000+0200},
title = {In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL.},
url = {http://dblp.uni-trier.de/db/journals/jpdc/jpdc160.html#MeyerKP22},
volume = 160,
year = 2022
}
