%0 Journal Article %1 journals/jcsc/JiangMSWH16 %A Jiang, Jian-Fei %A Mao, Zhigang %A Sheng, Weiguang %A Wang, Qin %A He, Weifeng %D 2016 %J Journal of Circuits, Systems, and Computers %K %N 10 %P 1650121:1-1650121:31 %T Delay Analysis and Design Optimization for Low-Swing RC-Limited Global Interconnects. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc25.html#JiangMSWH16 %V 25

@article{journals/jcsc/JiangMSWH16, added-at = {2023-12-13T05:09:33.000+0100}, author = {Jiang, Jian-Fei and Mao, Zhigang and Sheng, Weiguang and Wang, Qin and He, Weifeng}, biburl = {https://www.bibsonomy.org/bibtex/2a6b424c963760a72251ef05c52e13e24/admin}, ee = {https://doi.org/10.1142/S0218126616501218}, interhash = {9f26547e2ed127198c495713c4a9e953}, intrahash = {a6b424c963760a72251ef05c52e13e24}, journal = {Journal of Circuits, Systems, and Computers}, keywords = {}, number = 10, pages = {1650121:1-1650121:31}, timestamp = {2023-12-13T05:09:33.000+0100}, title = {Delay Analysis and Design Optimization for Low-Swing RC-Limited Global Interconnects.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc25.html#JiangMSWH16}, volume = 25, year = 2016 }