%0 Conference Paper %1 conf/ats/ChenCCW16 %A Chen, Harry H. %A Chen, Simon Y.-H. %A Chuang, Po-Yao %A Wu, Cheng-Wen %B ATS %D 2016 %I IEEE Computer Society %K dblp %P 197-202 %T Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation. %U http://dblp.uni-trier.de/db/conf/ats/ats2016.html#ChenCCW16 %@ 978-1-5090-3809-1

@inproceedings{conf/ats/ChenCCW16, added-at = {2023-09-30T00:00:00.000+0200}, author = {Chen, Harry H. and Chen, Simon Y.-H. and Chuang, Po-Yao and Wu, Cheng-Wen}, biburl = {https://www.bibsonomy.org/bibtex/2287adc45b5a1c06d43e69da7a6b063b0/dblp}, booktitle = {ATS}, crossref = {conf/ats/2016}, ee = {https://doi.ieeecomputersociety.org/10.1109/ATS.2016.33}, interhash = {a56e958bac04e78df49739e6e3f5f90b}, intrahash = {287adc45b5a1c06d43e69da7a6b063b0}, isbn = {978-1-5090-3809-1}, keywords = {dblp}, pages = {197-202}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T06:36:46.000+0200}, title = {Efficient Cell-Aware Fault Modeling by Switch-Level Test Generation.}, url = {http://dblp.uni-trier.de/db/conf/ats/ats2016.html#ChenCCW16}, year = 2016 }