Inproceedings,
34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell.
H. Fujiwara, H. Mori, W. Zhao, K. Khare, C. Lee, X. Peng, V. Joshi, C. Chuang, S. Hsu, T. Hashizume, T. Naganuma, C. Tien, Y. Liu, Y. Lai, C. Lee, T. Chou, K. Akarvardar, S. Adham, Y. Wang, Y. Chih, Y. Chen, H. Liao, and T. Chang.ISSCC, page 572-574. IEEE, (2024)
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- entry type
- inproceedings
- booktitle
- ISSCC
- year
- 2024
- pages
- 572-574
- publisher
- IEEE
- crossref
- conf/isscc/2024
- ee
- https://doi.org/10.1109/ISSCC49657.2024.10454556
- isbn
- 979-8-3503-0620-0
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- http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#FujiwaraMZKLPJCHHNTLLLCAAWCCLC24
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%1 conf/isscc/FujiwaraMZKLPJCHHNTLLLCAAWCCLC24
%A Fujiwara, Hidehiro
%A Mori, Haruki
%A Zhao, Wei-Chang
%A Khare, Kinshuk
%A Lee, Cheng-En
%A Peng, Xiaochen
%A Joshi, Vineet
%A Chuang, Chao-Kai
%A Hsu, Shu-Huan
%A Hashizume, Takeshi
%A Naganuma, Toshiaki
%A Tien, Chen-Hung
%A Liu, Yao-Yi
%A Lai, Yen-Chien
%A Lee, Chia-Fu
%A Chou, Tan-Li
%A Akarvardar, Kerem
%A Adham, Saman
%A Wang, Yih
%A Chih, Yu-Der
%A Chen, Yen-Huei
%A Liao, Hung-Jen
%A Chang, Tsung-Yung Jonathan
%B ISSCC
%D 2024
%I IEEE
%K dblp
%P 572-574
%T 34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#FujiwaraMZKLPJCHHNTLLLCAAWCCLC24
%@ 979-8-3503-0620-0
@inproceedings{conf/isscc/FujiwaraMZKLPJCHHNTLLLCAAWCCLC24,
added-at = {2024-03-19T00:00:00.000+0100},
author = {Fujiwara, Hidehiro and Mori, Haruki and Zhao, Wei-Chang and Khare, Kinshuk and Lee, Cheng-En and Peng, Xiaochen and Joshi, Vineet and Chuang, Chao-Kai and Hsu, Shu-Huan and Hashizume, Takeshi and Naganuma, Toshiaki and Tien, Chen-Hung and Liu, Yao-Yi and Lai, Yen-Chien and Lee, Chia-Fu and Chou, Tan-Li and Akarvardar, Kerem and Adham, Saman and Wang, Yih and Chih, Yu-Der and Chen, Yen-Huei and Liao, Hung-Jen and Chang, Tsung-Yung Jonathan},
biburl = {https://www.bibsonomy.org/bibtex/24f1e03224ace85032659998988fce83d/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2024},
ee = {https://doi.org/10.1109/ISSCC49657.2024.10454556},
interhash = {a678c582188822708876a1bfd1d0994a},
intrahash = {4f1e03224ace85032659998988fce83d},
isbn = {979-8-3503-0620-0},
keywords = {dblp},
pages = {572-574},
publisher = {IEEE},
timestamp = {2024-04-09T20:43:07.000+0200},
title = {34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2024.html#FujiwaraMZKLPJCHHNTLLLCAAWCCLC24},
year = 2024
}