%0 Conference Paper %1 conf/aspdac/KoharaTUMTYO06 %A Kohara, Shunitsu %A Tomono, Naoki %A Uchida, Jumpei %A Miyaoka, Yuichiro %A Togawa, Nozomu %A Yanagisawa, Masao %A Ohtsuki, Tatsuo %B ASP-DAC %D 2006 %E Hirose, Fumiyasu %I IEEE %K dblp %P 594-599 %T An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2006.html#KoharaTUMTYO06 %@ 0-7803-9451-8

@inproceedings{conf/aspdac/KoharaTUMTYO06, added-at = {2018-11-06T00:00:00.000+0100}, author = {Kohara, Shunitsu and Tomono, Naoki and Uchida, Jumpei and Miyaoka, Yuichiro and Togawa, Nozomu and Yanagisawa, Masao and Ohtsuki, Tatsuo}, biburl = {https://www.bibsonomy.org/bibtex/2ffa1ffe45b224d29a7927ff248b59249/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2006}, editor = {Hirose, Fumiyasu}, ee = {https://doi.org/10.1145/1118299.1118440}, interhash = {a6a6dd0b341fb7bd34afd5ff18cd9938}, intrahash = {ffa1ffe45b224d29a7927ff248b59249}, isbn = {0-7803-9451-8}, keywords = {dblp}, pages = {594-599}, publisher = {IEEE}, timestamp = {2019-10-17T16:45:43.000+0200}, title = {An interface-circuit synthesis method with configurable processor core in IP-based SoC designs.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2006.html#KoharaTUMTYO06}, year = 2006 }