%0 Conference Paper %1 conf/itc/ChangCHSS98 %A Chang, Ed %A Cheung, David %A Huston, Robert E. %A Seaton, Jim %A Smith, Gary %B ITC %D 1998 %I IEEE Computer Society %K dblp %P 500-506 %T A scalable architecture for VLSI test. %U http://dblp.uni-trier.de/db/conf/itc/itc1998.html#ChangCHSS98 %@ 0-7803-5093-6

@inproceedings{conf/itc/ChangCHSS98, added-at = {2023-03-23T00:00:00.000+0100}, author = {Chang, Ed and Cheung, David and Huston, Robert E. and Seaton, Jim and Smith, Gary}, biburl = {https://www.bibsonomy.org/bibtex/23f4d45d27a5840c2c7cebdd5b26a616b/dblp}, booktitle = {ITC}, crossref = {conf/itc/1998}, ee = {https://doi.ieeecomputersociety.org/10.1109/TEST.1998.743192}, interhash = {a83b0e95a0dfa753320f2b8c420e077c}, intrahash = {3f4d45d27a5840c2c7cebdd5b26a616b}, isbn = {0-7803-5093-6}, keywords = {dblp}, pages = {500-506}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T19:53:01.000+0200}, title = {A scalable architecture for VLSI test.}, url = {http://dblp.uni-trier.de/db/conf/itc/itc1998.html#ChangCHSS98}, year = 1998 }