%0 Conference Paper %1 conf/dsd/GibilukaMC15 %A Gibiluka, Matheus %A Moreira, Matheus Trevisan %A Calazans, Ney Laert Vilar %B DSD %D 2015 %I IEEE Computer Society %K dblp %P 79-86 %T A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2015.html#GibilukaMC15 %@ 978-1-4673-8035-5

@inproceedings{conf/dsd/GibilukaMC15, added-at = {2023-03-23T00:00:00.000+0100}, author = {Gibiluka, Matheus and Moreira, Matheus Trevisan and Calazans, Ney Laert Vilar}, biburl = {https://www.bibsonomy.org/bibtex/23898bb9b1305f4cd5a3c5f5eaf93acbd/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2015}, ee = {https://doi.ieeecomputersociety.org/10.1109/DSD.2015.104}, interhash = {aabc91a352858ccd0532c5bb79cd1831}, intrahash = {3898bb9b1305f4cd5a3c5f5eaf93acbd}, isbn = {978-1-4673-8035-5}, keywords = {dblp}, pages = {79-86}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:11:29.000+0200}, title = {A Bundled-Data Asynchronous Circuit Synthesis Flow Using a Commercial EDA Framework.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2015.html#GibilukaMC15}, year = 2015 }