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%0 Journal Article
%1 journals/mam/ManciniMMMT16
%A Mancini, Toni
%A Mari, Federico
%A Massini, Annalisa
%A Melatti, Igor
%A Tronci, Enrico
%D 2016
%J Microprocess. Microsystems
%K dblp
%P 12-28
%T Anytime system level verification via parallel random exhaustive hardware in the loop simulation.
%U http://dblp.uni-trier.de/db/journals/mam/mam41.html#ManciniMMMT16
%V 41
@article{journals/mam/ManciniMMMT16,
added-at = {2020-02-22T00:00:00.000+0100},
author = {Mancini, Toni and Mari, Federico and Massini, Annalisa and Melatti, Igor and Tronci, Enrico},
biburl = {https://www.bibsonomy.org/bibtex/2596cead860f989cf64c0852070df793f/dblp},
ee = {https://doi.org/10.1016/j.micpro.2015.10.010},
interhash = {af863bf3a325f127a1753a16e7a0812e},
intrahash = {596cead860f989cf64c0852070df793f},
journal = {Microprocess. Microsystems},
keywords = {dblp},
pages = {12-28},
timestamp = {2020-02-25T12:52:06.000+0100},
title = {Anytime system level verification via parallel random exhaustive hardware in the loop simulation.},
url = {http://dblp.uni-trier.de/db/journals/mam/mam41.html#ManciniMMMT16},
volume = 41,
year = 2016
}