Article,

A 3.6-Gb/s point-to-point heterogeneous-voltage-capable DRAM interface for capacity-scalable memory subsystems.

, , , , , , , , , , , , , , , and .
IEEE J. Solid State Circuits, 40 (1): 233-244 (2005)

Meta data

Tags

Users

  • @dblp

Comments and Reviews