%0 Conference Paper %1 conf/vlsid/TuCJ07 %A Tu, Jiajin %A Chen, Jian %A John, Lizy K. %B VLSI Design %D 2007 %I IEEE Computer Society %K dblp %P 673-678 %T Hardware Efficient Piecewise Linear Branch Predictor. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#TuCJ07 %@ 0-7695-2762-0

@inproceedings{conf/vlsid/TuCJ07, added-at = {2023-03-24T00:00:00.000+0100}, author = {Tu, Jiajin and Chen, Jian and John, Lizy K.}, biburl = {https://www.bibsonomy.org/bibtex/248293736131146c83023cd7c02a2cefb/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2007}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2007.89}, interhash = {b4d3e5d16e983dd79ad4a6176cd6d660}, intrahash = {48293736131146c83023cd7c02a2cefb}, isbn = {0-7695-2762-0}, keywords = {dblp}, pages = {673-678}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:09.000+0200}, title = {Hardware Efficient Piecewise Linear Branch Predictor.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2007.html#TuCJ07}, year = 2007 }