%0 Conference Paper %1 conf/fpga/HeitheckerE05 %A Heithecker, Sven %A Ernst, Rolf %B FPGA %D 2005 %E Schmit, Herman %E Wilton, Steven J. E. %I ACM %K %P 277 %T An FPGA based SDRAM controller with complex QoS scheduling and traffic shaping (abstract only). %U http://dblp.uni-trier.de/db/conf/fpga/fpga2005.html#HeitheckerE05 %@ 1-59593-029-9

@inproceedings{conf/fpga/HeitheckerE05, added-at = {2023-12-13T07:23:33.000+0100}, author = {Heithecker, Sven and Ernst, Rolf}, biburl = {https://www.bibsonomy.org/bibtex/20f926a530085b54992b599e8b2c49e35/admin}, booktitle = {FPGA}, crossref = {conf/fpga/2005}, editor = {Schmit, Herman and Wilton, Steven J. E.}, ee = {https://doi.org/10.1145/1046192.1046260}, interhash = {b86a2525a2c1736d430b663abfb9aaa4}, intrahash = {0f926a530085b54992b599e8b2c49e35}, isbn = {1-59593-029-9}, keywords = {}, pages = 277, publisher = {ACM}, timestamp = {2023-12-13T07:23:33.000+0100}, title = {An FPGA based SDRAM controller with complex QoS scheduling and traffic shaping (abstract only).}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2005.html#HeitheckerE05}, year = 2005 }