%0 Conference Paper %1 conf/iscas/WiesbauerSGCHG06 %A Wiesbauer, Andreas %A Sträußnigg, Dietmar %A Gaggl, Richard %A Clara, Martin %A Hernández, Luis %A Gruber, Daniel %B ISCAS %D 2006 %I IEEE %K dblp %T Clock jitter compensation for current steering DACs. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#WiesbauerSGCHG06 %@ 0-7803-9389-9

@inproceedings{conf/iscas/WiesbauerSGCHG06, added-at = {2020-11-30T00:00:00.000+0100}, author = {Wiesbauer, Andreas and Sträußnigg, Dietmar and Gaggl, Richard and Clara, Martin and Hernández, Luis and Gruber, Daniel}, biburl = {https://www.bibsonomy.org/bibtex/221f90df43af573ec641a25c391a98dc8/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2006}, ee = {https://doi.org/10.1109/ISCAS.2006.1693848}, interhash = {baad73a571b0650e52f61868f9eec9fa}, intrahash = {21f90df43af573ec641a25c391a98dc8}, isbn = {0-7803-9389-9}, keywords = {dblp}, publisher = {IEEE}, timestamp = {2020-12-01T11:38:23.000+0100}, title = {Clock jitter compensation for current steering DACs.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#WiesbauerSGCHG06}, year = 2006 }