Inproceedings,
3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance.
H. Mair, E. Wang, A. Wang, P. Kao, Y. Tsai, S. Gururajarao, R. Lagerquist, J. Son, G. Gammie, G. Lin, A. Thippana, K. Li, M. Rahman, W. Kuo, D. Yen, Y. Zhuang, U. Fu, H. Wang, M. Peng, C. Wu, T. Dosluoglu, A. Gelman, D. Dia, G. Gurumurthy, T. Hsieh, W. Lin, R. Tzeng, J. Wu, C. Wang, and U. Ko.ISSCC, page 56-57. IEEE, (2017)
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- conf/isscc/MairWWKTGLSGLTL17
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- inproceedings
- booktitle
- ISSCC
- year
- 2017
- pages
- 56-57
- publisher
- IEEE
- crossref
- conf/isscc/2017
- ee
- http://dx.doi.org/10.1109/ISSCC.2017.7870258
- isbn
- 978-1-5090-3758-2
- url
- http://dblp.uni-trier.de/db/conf/isscc/isscc2017.html#MairWWKTGLSGLTL17
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%1 conf/isscc/MairWWKTGLSGLTL17
%A Mair, Hugh
%A Wang, Ericbill
%A Wang, Alice
%A Kao, Ping
%A Tsai, Yuwen
%A Gururajarao, Sumanth
%A Lagerquist, Rolf
%A Son, Jin
%A Gammie, Gordon
%A Lin, Gordon
%A Thippana, Achuta
%A Li, Kent
%A Rahman, Manzur
%A Kuo, Wuan
%A Yen, David
%A Zhuang, Yi-Chang
%A Fu, Ue
%A Wang, Hung-Wei
%A Peng, Mark
%A Wu, Cheng-Yuh
%A Dosluoglu, Taner
%A Gelman, Anatoly
%A Dia, Daniel
%A Gurumurthy, Girishankar
%A Hsieh, Tony
%A Lin, W. X.
%A Tzeng, Ray
%A Wu, Jengding
%A Wang, C. H.
%A Ko, Uming
%B ISSCC
%D 2017
%I IEEE
%K
%P 56-57
%T 3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2017.html#MairWWKTGLSGLTL17
%@ 978-1-5090-3758-2
@inproceedings{conf/isscc/MairWWKTGLSGLTL17,
added-at = {2023-12-13T07:38:39.000+0100},
author = {Mair, Hugh and Wang, Ericbill and Wang, Alice and Kao, Ping and Tsai, Yuwen and Gururajarao, Sumanth and Lagerquist, Rolf and Son, Jin and Gammie, Gordon and Lin, Gordon and Thippana, Achuta and Li, Kent and Rahman, Manzur and Kuo, Wuan and Yen, David and Zhuang, Yi-Chang and Fu, Ue and Wang, Hung-Wei and Peng, Mark and Wu, Cheng-Yuh and Dosluoglu, Taner and Gelman, Anatoly and Dia, Daniel and Gurumurthy, Girishankar and Hsieh, Tony and Lin, W. X. and Tzeng, Ray and Wu, Jengding and Wang, C. H. and Ko, Uming},
biburl = {https://www.bibsonomy.org/bibtex/2137e2503a556605f965f3c02bda044b1/admin},
booktitle = {ISSCC},
crossref = {conf/isscc/2017},
ee = {http://dx.doi.org/10.1109/ISSCC.2017.7870258},
interhash = {bb832c5eaee1167a502692387cddd561},
intrahash = {137e2503a556605f965f3c02bda044b1},
isbn = {978-1-5090-3758-2},
keywords = {},
pages = {56-57},
publisher = {IEEE},
timestamp = {2023-12-13T07:38:39.000+0100},
title = {3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2017.html#MairWWKTGLSGLTL17},
year = 2017
}