%0 Journal Article %1 journals/tcad/BanerjeeSS11 %A Banerjee, Pritha %A Sangtani, Megha %A Sur-Kolay, Susmita %D 2011 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 1 %P 8-17 %T Floorplanning for Partially Reconfigurable FPGAs. %U http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#BanerjeeSS11 %V 30

@article{journals/tcad/BanerjeeSS11, added-at = {2023-08-28T00:00:00.000+0200}, author = {Banerjee, Pritha and Sangtani, Megha and Sur-Kolay, Susmita}, biburl = {https://www.bibsonomy.org/bibtex/2bea0ecf61646ccdb79a5400e5278ee78/dblp}, ee = {https://doi.org/10.1109/TCAD.2010.2079390}, interhash = {c0046b888a301e9e9bf55641ce3c76e2}, intrahash = {bea0ecf61646ccdb79a5400e5278ee78}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 1, pages = {8-17}, timestamp = {2024-04-08T19:45:35.000+0200}, title = {Floorplanning for Partially Reconfigurable FPGAs.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad30.html#BanerjeeSS11}, volume = 30, year = 2011 }