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%0 Conference Paper
%1 conf/nanoarch/WangTP16
%A Wang, Xiaoxiao
%A Tan, Robin
%A Perkowski, Marek A.
%B NANOARCH
%D 2016
%I ACM
%K dblp
%P 97-102
%T Synthesis of memristive circuits based on stateful IMPLY gates using an evolutionary algorithm with a correction function.
%U http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2016.html#WangTP16
%@ 978-1-4503-4330-5
@inproceedings{conf/nanoarch/WangTP16,
added-at = {2017-05-23T00:00:00.000+0200},
author = {Wang, Xiaoxiao and Tan, Robin and Perkowski, Marek A.},
biburl = {https://www.bibsonomy.org/bibtex/2e70f122b9fb5db654bbc84ae5e9be5b3/dblp},
booktitle = {NANOARCH},
crossref = {conf/nanoarch/2016},
ee = {https://doi.org/10.1145/2950067.2950087},
interhash = {c2e15fd8a0bafef5b7f8b26dc2aaeae8},
intrahash = {e70f122b9fb5db654bbc84ae5e9be5b3},
isbn = {978-1-4503-4330-5},
keywords = {dblp},
pages = {97-102},
publisher = {ACM},
timestamp = {2019-10-17T22:53:38.000+0200},
title = {Synthesis of memristive circuits based on stateful IMPLY gates using an evolutionary algorithm with a correction function.},
url = {http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2016.html#WangTP16},
year = 2016
}