%0 Conference Paper %1 conf/vlsid/PathakSPG16 %A Pathak, Apoorva %A Sachan, Divyesh %A Peta, Harish %A Goswami, Manish %B VLSID %D 2016 %I IEEE Computer Society %K dblp %P 122-127 %T A Modified SRAM Based Low Power Memory Design. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2016.html#PathakSPG16 %@ 978-1-4673-8700-2

@inproceedings{conf/vlsid/PathakSPG16, added-at = {2023-03-24T00:00:00.000+0100}, author = {Pathak, Apoorva and Sachan, Divyesh and Peta, Harish and Goswami, Manish}, biburl = {https://www.bibsonomy.org/bibtex/2518b484acdc342375fb730cd2c0481e4/dblp}, booktitle = {VLSID}, crossref = {conf/vlsid/2016}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2016.80}, interhash = {c536d256341664cbb4c7241be0687886}, intrahash = {518b484acdc342375fb730cd2c0481e4}, isbn = {978-1-4673-8700-2}, keywords = {dblp}, pages = {122-127}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T01:05:31.000+0200}, title = {A Modified SRAM Based Low Power Memory Design.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2016.html#PathakSPG16}, year = 2016 }