Artikel,

PRODESIGN OF HIGH PERFORMANCE NOC ROUTER

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International Journal of Applied Control, Electrical and Electronics Engineering (IJACEEE), 2 (1): 31-43 (Februar 2014)

Zusammenfassung

This is a high performance NoC Router that handles precise localizations of the faulty parts of the NoC. The proposed router is based on new error detection mechanisms suitable for dynamic NoCs, where the position of processor elements or faulty blocks varies during runtime. Indeed, I propose an online Error detection mechanism using CRC Algorithm. Proposed mechanism is able to discriminate permanent and transient errors and localize precisely the position of the faulty blocks in the NoC routers, while preserving the throughput, the network load, and the data packet latency.

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