%0 Conference Paper %1 conf/aspdac/CornagliaHV0R20 %A Cornaglia, Alessandro %A Hasan, Md. Shakib %A Viehl, Alexander %A Bringmann, Oliver %A Rosenstiel, Wolfgang %B ASP-DAC %D 2020 %I IEEE %K dblp %P 369-374 %T JIT-Based Context-Sensitive Timing Simulation for Efficient Platform Exploration. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2020.html#CornagliaHV0R20 %@ 978-1-7281-4123-7

@inproceedings{conf/aspdac/CornagliaHV0R20, added-at = {2020-03-30T00:00:00.000+0200}, author = {Cornaglia, Alessandro and Hasan, Md. Shakib and Viehl, Alexander and Bringmann, Oliver and Rosenstiel, Wolfgang}, biburl = {https://www.bibsonomy.org/bibtex/2d404f4c9dde6e2b953182d25f24484e1/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2020}, ee = {https://doi.org/10.1109/ASP-DAC47756.2020.9045255}, interhash = {ca3b0e9b05d232fe0f8cb581c1d25d84}, intrahash = {d404f4c9dde6e2b953182d25f24484e1}, isbn = {978-1-7281-4123-7}, keywords = {dblp}, pages = {369-374}, publisher = {IEEE}, timestamp = {2020-03-31T11:41:03.000+0200}, title = {JIT-Based Context-Sensitive Timing Simulation for Efficient Platform Exploration.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2020.html#CornagliaHV0R20}, year = 2020 }