%0 Conference Paper %1 conf/vlsid/BansalKKMCR08 %A Bansal, Aditya %A Kim, Jae-Joon %A Kim, Keunwoo %A Mukhopadhyay, Saibal %A Chuang, Ching-Te %A Roy, Kaushik %B VLSI Design %D 2008 %I IEEE Computer Society %K dblp %P 125-130 %T Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2008.html#BansalKKMCR08 %@ 0-7695-3083-4

@inproceedings{conf/vlsid/BansalKKMCR08, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bansal, Aditya and Kim, Jae-Joon and Kim, Keunwoo and Mukhopadhyay, Saibal and Chuang, Ching-Te and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/2d15b8d35ede1751e4b6498dd6293ad34/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2008}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.2008.50}, interhash = {ce0f7df5853ed8f369c0c058ecccf4e4}, intrahash = {d15b8d35ede1751e4b6498dd6293ad34}, isbn = {0-7695-3083-4}, keywords = {dblp}, pages = {125-130}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:22.000+0200}, title = {Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2008.html#BansalKKMCR08}, year = 2008 }