%0 Conference Paper %1 conf/vlsi-dat/HaoCY12 %A Hao, Cong %A Chen, Song %A Yoshimura, Takeshi %B VLSI-DAT %D 2012 %I IEEE %K dblp %P 1-4 %T Port assignment for interconnect reduction in high-level synthesis. %U http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2012.html#HaoCY12 %@ 978-1-4577-2080-2

@inproceedings{conf/vlsi-dat/HaoCY12, added-at = {2018-08-30T00:00:00.000+0200}, author = {Hao, Cong and Chen, Song and Yoshimura, Takeshi}, biburl = {https://www.bibsonomy.org/bibtex/233fd19ad213115d415707f960d7aafe8/dblp}, booktitle = {VLSI-DAT}, crossref = {conf/vlsi-dat/2012}, ee = {https://doi.org/10.1109/VLSI-DAT.2012.6212613}, interhash = {cec4d5caaff736854374e0228be4eb79}, intrahash = {33fd19ad213115d415707f960d7aafe8}, isbn = {978-1-4577-2080-2}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2018-08-31T11:40:36.000+0200}, title = {Port assignment for interconnect reduction in high-level synthesis.}, url = {http://dblp.uni-trier.de/db/conf/vlsi-dat/vlsi-dat2012.html#HaoCY12}, year = 2012 }