%0 Conference Paper %1 conf/fpl/WeeSB05 %A Wee, Chin Mun %A Sutton, Peter R. %A Bergmann, Neil W. %B FPL %D 2005 %E Rissa, Tero %E Wilton, Steven J. E. %E Leong, Philip Heng Wai %I IEEE %K dblp %P 654-657 %T An FPGA Network Architecture for Accelerating 3DES - CBC. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2005.html#WeeSB05 %@ 0-7803-9362-7

@inproceedings{conf/fpl/WeeSB05, added-at = {2023-03-24T00:00:00.000+0100}, author = {Wee, Chin Mun and Sutton, Peter R. and Bergmann, Neil W.}, biburl = {https://www.bibsonomy.org/bibtex/28c4bba32ac070a703482f7f5ab19466f/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2005}, editor = {Rissa, Tero and Wilton, Steven J. E. and Leong, Philip Heng Wai}, ee = {https://doi.ieeecomputersociety.org/10.1109/FPL.2005.1515806}, interhash = {d1c69bca2be124d284447719341ee072}, intrahash = {8c4bba32ac070a703482f7f5ab19466f}, isbn = {0-7803-9362-7}, keywords = {dblp}, pages = {654-657}, publisher = {IEEE}, timestamp = {2024-04-10T14:52:35.000+0200}, title = {An FPGA Network Architecture for Accelerating 3DES - CBC.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2005.html#WeeSB05}, year = 2005 }