%0 Conference Paper %1 conf/vlsid/ReddySVS14 %A Reddy, B. Naveen Kumar %A Sekhar, M. Chandra %A Veeramachaneni, Sreehari %A Srinivas, M. B. %B VLSID %D 2014 %I IEEE Computer Society %K dblp %P 128-132 %T A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2014.html#ReddySVS14 %@ 978-1-4799-2513-1

@inproceedings{conf/vlsid/ReddySVS14, added-at = {2023-03-24T00:00:00.000+0100}, author = {Reddy, B. Naveen Kumar and Sekhar, M. Chandra and Veeramachaneni, Sreehari and Srinivas, M. B.}, biburl = {https://www.bibsonomy.org/bibtex/21d638fd6c106c37392e1d7c287b64242/dblp}, booktitle = {VLSID}, crossref = {conf/vlsid/2014}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2014.29}, interhash = {d67bb3a0b6ae274a86fd97c8035d825f}, intrahash = {1d638fd6c106c37392e1d7c287b64242}, isbn = {978-1-4799-2513-1}, keywords = {dblp}, pages = {128-132}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T01:04:47.000+0200}, title = {A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2014.html#ReddySVS14}, year = 2014 }