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%0 Conference Paper
%1 conf/springsim/HoseinyFarahabady18
%A HoseinyFarahabady, M. Reza
%A Bastani, Saeed
%A Taheri, Javid
%A Zomaya, Albert Y.
%A Tari, Zahir
%A Khan, Samee U.
%B SpringSim (HPC)
%D 2018
%E Watson, Layne T.
%E Sosonkina, Masha
%E Thacker, William I.
%E Weinbub, Josef
%I ACM
%K dblp
%P 6:1-6:11
%T Toward designing a dynamic CPU cap manager for timely dataflow platforms.
%U http://dblp.uni-trier.de/db/conf/springsim/hpc2018.html#HoseinyFarahabady18
@inproceedings{conf/springsim/HoseinyFarahabady18,
added-at = {2021-10-14T00:00:00.000+0200},
author = {HoseinyFarahabady, M. Reza and Bastani, Saeed and Taheri, Javid and Zomaya, Albert Y. and Tari, Zahir and Khan, Samee U.},
biburl = {https://www.bibsonomy.org/bibtex/2aaf5cc988e3786e036bdcfc9dd392305/dblp},
booktitle = {SpringSim (HPC)},
crossref = {conf/springsim/2018hpc},
editor = {Watson, Layne T. and Sosonkina, Masha and Thacker, William I. and Weinbub, Josef},
ee = {http://dl.acm.org/citation.cfm?id=3213075},
interhash = {da550642c84155ebc9c6d746abb5c1e1},
intrahash = {aaf5cc988e3786e036bdcfc9dd392305},
keywords = {dblp},
pages = {6:1-6:11},
publisher = {ACM},
timestamp = {2024-04-10T06:58:59.000+0200},
title = {Toward designing a dynamic CPU cap manager for timely dataflow platforms.},
url = {http://dblp.uni-trier.de/db/conf/springsim/hpc2018.html#HoseinyFarahabady18},
year = 2018
}