%0 Journal Article %1 journals/vlsisp/FatemiAS13 %A Fatemi, Mohammad Reza Hosseiny %A Ates, Hasan F. %A Salleh, Rosli %D 2013 %J J. Signal Process. Syst. %K dblp %N 2 %P 111-121 %T Analysis and Design of Low-Cost Bit-Serial Architectures for Motion Estimation in H.264/AVC. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp71.html#FatemiAS13 %V 71

@article{journals/vlsisp/FatemiAS13, added-at = {2020-03-12T00:00:00.000+0100}, author = {Fatemi, Mohammad Reza Hosseiny and Ates, Hasan F. and Salleh, Rosli}, biburl = {https://www.bibsonomy.org/bibtex/2eedea34f21004b4676a913bbd38e003c/dblp}, ee = {https://doi.org/10.1007/s11265-012-0686-2}, interhash = {dcf5b9bd5f803557c4fcab6de84fbb0e}, intrahash = {eedea34f21004b4676a913bbd38e003c}, journal = {J. Signal Process. Syst.}, keywords = {dblp}, number = 2, pages = {111-121}, timestamp = {2020-03-13T12:00:06.000+0100}, title = {Analysis and Design of Low-Cost Bit-Serial Architectures for Motion Estimation in H.264/AVC.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp71.html#FatemiAS13}, volume = 71, year = 2013 }