%0 Conference Paper %1 conf/icecsys/ClercAAKKR11 %A Clerc, Sylvain %A Abouzeid, Fady %A Argoud, Fabrice %A Kumar, Abhay %A Kumar, Rajesh %A Roche, Philippe %B ICECS %D 2011 %I IEEE %K dblp %P 117-120 %T A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform. %U http://dblp.uni-trier.de/db/conf/icecsys/icecsys2011.html#ClercAAKKR11 %@ 978-1-4577-1845-8

@inproceedings{conf/icecsys/ClercAAKKR11, added-at = {2023-06-15T00:00:00.000+0200}, author = {Clerc, Sylvain and Abouzeid, Fady and Argoud, Fabrice and Kumar, Abhay and Kumar, Rajesh and Roche, Philippe}, biburl = {https://www.bibsonomy.org/bibtex/2c15eada19444c397a3f5412cd2b77b81/dblp}, booktitle = {ICECS}, crossref = {conf/icecsys/2011}, ee = {https://doi.org/10.1109/ICECS.2011.6122228}, interhash = {dd64145105a958e4a98fae8cdb233a41}, intrahash = {c15eada19444c397a3f5412cd2b77b81}, isbn = {978-1-4577-1845-8}, keywords = {dblp}, pages = {117-120}, publisher = {IEEE}, timestamp = {2024-04-10T09:53:20.000+0200}, title = {A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform.}, url = {http://dblp.uni-trier.de/db/conf/icecsys/icecsys2011.html#ClercAAKKR11}, year = 2011 }