Abstract
The work presented here is a summary of the result obtained when Multiplexer was simulated using simulator: OrCAD Capture 16.5. The Multiplexer is made using the universal logic gates formed by Josephson junction. This allows us to focus our attention on solely the output characteristics and related results derived from the Multiplexer. We begin by describing formation of universal gates and more. We conclude by stating the output characteristics are in match with the multiplexer.
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