%0 Conference Paper %1 7345019 %A Gerlach, L. %A Payá-Vayá, G. %A Blume, H. %B Signal Processing Systems (SiPS), 2015 IEEE Workshop on %D 2015 %K 2015 myown %P 1-6 %R 10.1109/SiPS.2015.7345019 %T An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processors %U http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7345019 %X This paper explores a real- and complex-valued multiply-accumulate (MAC) functional unit for digital signal processors. MAC units with single-instruction-multiple-data (SIMD) support are often used to increase the processing performance in modern signal processing processors. Compared to a real-valued SIMD-MAC units, the proposed unit uses the same multipliers to also support complex-valued SIMD-MAC and butterfly operations. The area overhead for the complex mode is small. Complex-valued operations speed up signal processing algorithms and make the execution more efficient in terms of power consumption. As a case study, a fast Fourier transform (FFT) is implemented for a VLIW-processor with a complex-valued SIMD butterfly extension. The proposed functional unit is quantitatively evaluated in terms of performance, silicon area, and power consumption.

@inproceedings{7345019, abstract = {This paper explores a real- and complex-valued multiply-accumulate (MAC) functional unit for digital signal processors. MAC units with single-instruction-multiple-data (SIMD) support are often used to increase the processing performance in modern signal processing processors. Compared to a real-valued SIMD-MAC units, the proposed unit uses the same multipliers to also support complex-valued SIMD-MAC and butterfly operations. The area overhead for the complex mode is small. Complex-valued operations speed up signal processing algorithms and make the execution more efficient in terms of power consumption. As a case study, a fast Fourier transform (FFT) is implemented for a VLIW-processor with a complex-valued SIMD butterfly extension. The proposed functional unit is quantitatively evaluated in terms of performance, silicon area, and power consumption.}, added-at = {2016-04-20T12:56:54.000+0200}, author = {Gerlach, L. and Payá-Vayá, G. and Blume, H.}, biburl = {https://www.bibsonomy.org/bibtex/266643956a9219f058d270ae24a380963/imsl3s}, booktitle = {Signal Processing Systems (SiPS), 2015 IEEE Workshop on}, description = {IEEE Xplore Abstract - An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processo...}, doi = {10.1109/SiPS.2015.7345019}, interhash = {efff5e501a3e5a931d625c1ce0e3b5ce}, intrahash = {66643956a9219f058d270ae24a380963}, keywords = {2015 myown}, month = oct, pages = {1-6}, timestamp = {2016-04-20T13:00:06.000+0200}, title = {An area efficient real- and complex-valued multiply-accumulate SIMD unit for digital signal processors}, url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7345019}, year = 2015 }