%0 Journal Article %1 journals/tvlsi/WangXYDWWWLM16 %A Wang, Zhehui %A Xu, Jiang %A Yang, Peng %A Duong, Luan Huu Kinh %A Wang, Zhifei %A Wang, Xuan %A Wang, Zhe %A Li, Haoran %A Maeda, Rafael Kioji Vivas %D 2016 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 7 %P 2462-2474 %T A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#WangXYDWWWLM16 %V 24

@article{journals/tvlsi/WangXYDWWWLM16, added-at = {2022-01-03T00:00:00.000+0100}, author = {Wang, Zhehui and Xu, Jiang and Yang, Peng and Duong, Luan Huu Kinh and Wang, Zhifei and Wang, Xuan and Wang, Zhe and Li, Haoran and Maeda, Rafael Kioji Vivas}, biburl = {https://www.bibsonomy.org/bibtex/26e4a8f85d4f7a01bf538f36594b08ec1/dblp}, ee = {https://doi.org/10.1109/TVLSI.2015.2511065}, interhash = {f30cd13e2868188685a9604bf387fe47}, intrahash = {6e4a8f85d4f7a01bf538f36594b08ec1}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 7, pages = {2462-2474}, timestamp = {2024-04-08T14:32:48.000+0200}, title = {A Holistic Modeling and Analysis of Optical-Electrical Interfaces for Inter/Intra-chip Interconnects.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#WangXYDWWWLM16}, volume = 24, year = 2016 }