%0 Journal Article %1 journals/iet-cdt/JangKC14 %A Jang, Cheoljon %A Kim, Jaehwan %A Chong, Jong-Wha %D 2014 %J IET Comput. Digit. Tech. %K dblp %N 5 %P 210-218 %T Power-aware floorplanning-based power throughsilicon- via technology and bump minimisation for three-dimensional power delivery network. %U http://dblp.uni-trier.de/db/journals/iet-cdt/iet-cdt8.html#JangKC14 %V 8

@article{journals/iet-cdt/JangKC14, added-at = {2020-07-14T00:00:00.000+0200}, author = {Jang, Cheoljon and Kim, Jaehwan and Chong, Jong-Wha}, biburl = {https://www.bibsonomy.org/bibtex/23edc38edf4e39772890a8c25e709bc5c/dblp}, ee = {https://doi.org/10.1049/iet-cdt.2013.0118}, interhash = {ff46b40f558daf01f3fc3b0724c7eb87}, intrahash = {3edc38edf4e39772890a8c25e709bc5c}, journal = {IET Comput. Digit. Tech.}, keywords = {dblp}, number = 5, pages = {210-218}, timestamp = {2020-07-24T00:16:29.000+0200}, title = {Power-aware floorplanning-based power throughsilicon- via technology and bump minimisation for three-dimensional power delivery network.}, url = {http://dblp.uni-trier.de/db/journals/iet-cdt/iet-cdt8.html#JangKC14}, volume = 8, year = 2014 }