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%0 Conference Paper
%1 conf/isscc/KumarS0H0DM22
%A Kumar, Raghavan
%A Suresh, Vikram B.
%A Anders, Mark A.
%A Hsu, Steven K.
%A Agarwal, Amit
%A De, Vivek K.
%A Mathew, Sanu K.
%B ISSCC
%D 2022
%I IEEE
%K dblp
%P 1-3
%T An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOS.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2022.html#KumarS0H0DM22
%@ 978-1-6654-2800-2
@inproceedings{conf/isscc/KumarS0H0DM22,
added-at = {2022-03-21T00:00:00.000+0100},
author = {Kumar, Raghavan and Suresh, Vikram B. and Anders, Mark A. and Hsu, Steven K. and Agarwal, Amit and De, Vivek K. and Mathew, Sanu K.},
biburl = {https://www.bibsonomy.org/bibtex/272a892192e3ef4758d0fcfdc4dafaf02/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2022},
ee = {https://doi.org/10.1109/ISSCC42614.2022.9731739},
interhash = {00f534ce73fe38df72d9643ed3c910ab},
intrahash = {72a892192e3ef4758d0fcfdc4dafaf02},
isbn = {978-1-6654-2800-2},
keywords = {dblp},
pages = {1-3},
publisher = {IEEE},
timestamp = {2024-04-09T20:43:16.000+0200},
title = {An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOS.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2022.html#KumarS0H0DM22},
year = 2022
}
