%0 Conference Paper %1 conf/dac/SaifhashemiP03 %A Saifhashemi, Arash %A Pedram, Hossein %B DAC %D 2003 %I ACM %K dblp %P 330-333 %T Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction. %U http://dblp.uni-trier.de/db/conf/dac/dac2003.html#SaifhashemiP03 %@ 1-58113-688-9

@inproceedings{conf/dac/SaifhashemiP03, added-at = {2018-11-06T00:00:00.000+0100}, author = {Saifhashemi, Arash and Pedram, Hossein}, biburl = {https://www.bibsonomy.org/bibtex/2151ff53c9526c24b18c0050d5326f437/dblp}, booktitle = {DAC}, crossref = {conf/dac/2003}, ee = {https://doi.org/10.1145/775832.775917}, interhash = {10a73aa2b212ad52efdd23019e058cfe}, intrahash = {151ff53c9526c24b18c0050d5326f437}, isbn = {1-58113-688-9}, keywords = {dblp}, pages = {330-333}, publisher = {ACM}, timestamp = {2018-11-07T15:13:29.000+0100}, title = {Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2003.html#SaifhashemiP03}, year = 2003 }