%0 Conference Paper %1 conf/vlsid/RajendranMKR11 %A Rajendran, Jeyavijayan %A Manem, Harika %A Karri, Ramesh %A Rose, Garrett S. %B VLSI Design %D 2011 %I IEEE Computer Society %K dblp %P 18-23 %T An Approach to Tolerate Process Related Variations in Memristor-Based Applications. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#RajendranMKR11 %@ 978-0-7695-4348-2

@inproceedings{conf/vlsid/RajendranMKR11, added-at = {2023-03-24T00:00:00.000+0100}, author = {Rajendran, Jeyavijayan and Manem, Harika and Karri, Ramesh and Rose, Garrett S.}, biburl = {https://www.bibsonomy.org/bibtex/2a9fe05043ecae7dc753f320ce82fd46f/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2011}, ee = {https://www.wikidata.org/entity/Q56931691}, interhash = {1a067780efc9f993de356c72812d06d4}, intrahash = {a9fe05043ecae7dc753f320ce82fd46f}, isbn = {978-0-7695-4348-2}, keywords = {dblp}, pages = {18-23}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:08:33.000+0200}, title = {An Approach to Tolerate Process Related Variations in Memristor-Based Applications.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#RajendranMKR11}, year = 2011 }