%0 Conference Paper %1 conf/vlsid/VaradarajanH19 %A Varadarajan, Aravind Krishnan %A Hsiao, Michael %B VLSID %D 2019 %I IEEE %K dblp %P 100-105 %T RTL Test Generation on Multi-core and Many-Core Architectures. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2019.html#VaradarajanH19 %@ 978-1-7281-0409-6

@inproceedings{conf/vlsid/VaradarajanH19, added-at = {2022-11-14T00:00:00.000+0100}, author = {Varadarajan, Aravind Krishnan and Hsiao, Michael}, biburl = {https://www.bibsonomy.org/bibtex/2cfb1323d8cf4cdb2744f0def01f677a2/dblp}, booktitle = {VLSID}, crossref = {conf/vlsid/2019}, ee = {https://doi.org/10.1109/VLSID.2019.00036}, interhash = {26889a03d60cc875a18415e82c416094}, intrahash = {cfb1323d8cf4cdb2744f0def01f677a2}, isbn = {978-1-7281-0409-6}, keywords = {dblp}, pages = {100-105}, publisher = {IEEE}, timestamp = {2024-04-10T01:04:29.000+0200}, title = {RTL Test Generation on Multi-core and Many-Core Architectures.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2019.html#VaradarajanH19}, year = 2019 }