%0 Conference Paper %1 conf/vts/GarciaAHMR98 %A García, T. A. %A Acosta, Antonio J. %A Huertas, José L. %A Mora, J. M. %A Ramos, J. %B VTS %D 1998 %I IEEE Computer Society %K dblp %P 92-97 %T Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. %U http://dblp.uni-trier.de/db/conf/vts/vts1998.html#GarciaAHMR98 %@ 0-8186-8436-4

@inproceedings{conf/vts/GarciaAHMR98, added-at = {2023-03-24T00:00:00.000+0100}, author = {García, T. A. and Acosta, Antonio J. and Huertas, José L. and Mora, J. M. and Ramos, J.}, biburl = {https://www.bibsonomy.org/bibtex/29443516e5a3a0bbba698c6c237059d05/dblp}, booktitle = {VTS}, crossref = {conf/vts/1998}, ee = {https://doi.ieeecomputersociety.org/10.1109/VTEST.1998.670854}, interhash = {2ad76e2edd6ff27413a3006b3cc974d2}, intrahash = {9443516e5a3a0bbba698c6c237059d05}, isbn = {0-8186-8436-4}, keywords = {dblp}, pages = {92-97}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T07:35:39.000+0200}, title = {Self-Timed Boundary-Scan Cells for Multi-Chip Module Test.}, url = {http://dblp.uni-trier.de/db/conf/vts/vts1998.html#GarciaAHMR98}, year = 1998 }