%0 Journal Article %1 journals/ijcta/AlbanoLTC15 %A Albano, Domenico %A Lanuzza, Marco %A Taco, Ramiro %A Crupi, Felice %D 2015 %J Int. J. Circuit Theory Appl. %K dblp %N 11 %P 1523-1540 %T Gate-level body biasing for subthreshold logic circuits: analytical modeling and design guidelines. %U http://dblp.uni-trier.de/db/journals/ijcta/ijcta43.html#AlbanoLTC15 %V 43

@article{journals/ijcta/AlbanoLTC15, added-at = {2024-02-05T00:00:00.000+0100}, author = {Albano, Domenico and Lanuzza, Marco and Taco, Ramiro and Crupi, Felice}, biburl = {https://www.bibsonomy.org/bibtex/230d7fd1d8353ceeeb17f65a14e1799d5/dblp}, ee = {https://doi.org/10.1002/cta.2016}, interhash = {83c06a7a4fb5d93be57c7963cc630745}, intrahash = {30d7fd1d8353ceeeb17f65a14e1799d5}, journal = {Int. J. Circuit Theory Appl.}, keywords = {dblp}, number = 11, pages = {1523-1540}, timestamp = {2024-04-08T20:21:46.000+0200}, title = {Gate-level body biasing for subthreshold logic circuits: analytical modeling and design guidelines.}, url = {http://dblp.uni-trier.de/db/journals/ijcta/ijcta43.html#AlbanoLTC15}, volume = 43, year = 2015 }