%0 Journal Article %1 journals/integration/KerinsMP07 %A Kerins, Tim %A Marnane, William P. %A Popovici, Emanuel M. %D 2007 %J Integr. %K dblp %N 1 %P 28-35 %T Versatile hardware architectures for GF(pm) arithmetic in public key cryptography. %U http://dblp.uni-trier.de/db/journals/integration/integration40.html#KerinsMP07 %V 40

@article{journals/integration/KerinsMP07, added-at = {2020-02-20T00:00:00.000+0100}, author = {Kerins, Tim and Marnane, William P. and Popovici, Emanuel M.}, biburl = {https://www.bibsonomy.org/bibtex/28e6113c370f82c9cce2e9770eec9fccf/dblp}, ee = {https://doi.org/10.1016/j.vlsi.2005.12.009}, interhash = {c13a57c56963b30415f05d7415709097}, intrahash = {8e6113c370f82c9cce2e9770eec9fccf}, journal = {Integr.}, keywords = {dblp}, number = 1, pages = {28-35}, timestamp = {2020-02-21T11:53:15.000+0100}, title = {Versatile hardware architectures for GF(pm) arithmetic in public key cryptography.}, url = {http://dblp.uni-trier.de/db/journals/integration/integration40.html#KerinsMP07}, volume = 40, year = 2007 }