Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Journal Article
%1 journals/jssc/Dominguez-Castro97
%A Domínguez-Castro, Rafael
%A Espejo, Servando
%A Rodríguez-Vázquez, Ángel
%A Carmona, Ricardo
%A Földesy, Péter
%A Zarándy, Ákos
%A Szolgay, Péter
%A Szirányi, Tamás
%A Roska, Tamás
%D 1997
%J IEEE J. Solid State Circuits
%K dblp
%N 7
%P 1013-1026
%T A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc32.html#Dominguez-Castro97
%V 32
@article{journals/jssc/Dominguez-Castro97,
added-at = {2022-10-02T00:00:00.000+0200},
author = {Domínguez-Castro, Rafael and Espejo, Servando and Rodríguez-Vázquez, Ángel and Carmona, Ricardo and Földesy, Péter and Zarándy, Ákos and Szolgay, Péter and Szirányi, Tamás and Roska, Tamás},
biburl = {https://www.bibsonomy.org/bibtex/22968dd7e11d1505153ef1bd87b76f1ad/dblp},
ee = {https://www.wikidata.org/entity/Q59343377},
interhash = {dadc69b8d6caccfa463d9dd862d85e90},
intrahash = {2968dd7e11d1505153ef1bd87b76f1ad},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 7,
pages = {1013-1026},
timestamp = {2024-04-08T10:42:46.000+0200},
title = {A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc32.html#Dominguez-Castro97},
volume = 32,
year = 1997
}