%0 Journal Article %1 journals/tvlsi/KulkarniR12 %A Kulkarni, Jaydeep P. %A Roy, Kaushik %D 2012 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 2 %P 319-332 %T Ultralow-Voltage Process-Variation-Tolerant Schmitt-Trigger-Based SRAM Design. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi20.html#KulkarniR12 %V 20

@article{journals/tvlsi/KulkarniR12, added-at = {2020-03-11T00:00:00.000+0100}, author = {Kulkarni, Jaydeep P. and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/2ae533629bf376cfdd9562eea91a532df/dblp}, ee = {https://doi.org/10.1109/TVLSI.2010.2100834}, interhash = {db74cb92390f3d66fc9ec512e7be5365}, intrahash = {ae533629bf376cfdd9562eea91a532df}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 2, pages = {319-332}, timestamp = {2020-03-12T11:41:44.000+0100}, title = {Ultralow-Voltage Process-Variation-Tolerant Schmitt-Trigger-Based SRAM Design.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi20.html#KulkarniR12}, volume = 20, year = 2012 }