%0 Journal Article %1 journals/ieicet/NakamuraITHSI12 %A Nakamura, Masatoshi %A Inagi, Masato %A Tanigawa, Kazuya %A Hironaka, Tetsuo %A Sato, Masayuki %A Ishiguro, Takashi %D 2012 %J IEICE Trans. Inf. Syst. %K dblp %N 2 %P 324-334 %T A Physical Design Method for a New Memory-Based Reconfigurable Architecture without Switch Blocks. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet95d.html#NakamuraITHSI12 %V 95-D

@article{journals/ieicet/NakamuraITHSI12, added-at = {2020-04-11T00:00:00.000+0200}, author = {Nakamura, Masatoshi and Inagi, Masato and Tanigawa, Kazuya and Hironaka, Tetsuo and Sato, Masayuki and Ishiguro, Takashi}, biburl = {https://www.bibsonomy.org/bibtex/20a28e4c5688889ffebadfe2671f5f832/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e95-d_2_324}, interhash = {dc2e3f1d802290ef9b76e840310578c5}, intrahash = {0a28e4c5688889ffebadfe2671f5f832}, journal = {IEICE Trans. Inf. Syst.}, keywords = {dblp}, number = 2, pages = {324-334}, timestamp = {2020-04-14T11:47:52.000+0200}, title = {A Physical Design Method for a New Memory-Based Reconfigurable Architecture without Switch Blocks.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet95d.html#NakamuraITHSI12}, volume = {95-D}, year = 2012 }