%0 Conference Paper %1 conf/aspdac/KitaharaHSTYUM06 %A Kitahara, Takeshi %A Hara, Hiroyuki %A Shiratake, Shinichiro %A Tsukiboshi, Yoshiki %A Yoda, Tomoyuki %A Utsumi, Tetsuaki %A Minami, Fumihiro %B ASP-DAC %D 2006 %E Hirose, Fumiyasu %I IEEE %K dblp %P 533-540 %T Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2006.html#KitaharaHSTYUM06 %@ 0-7803-9451-8

@inproceedings{conf/aspdac/KitaharaHSTYUM06, added-at = {2018-11-06T00:00:00.000+0100}, author = {Kitahara, Takeshi and Hara, Hiroyuki and Shiratake, Shinichiro and Tsukiboshi, Yoshiki and Yoda, Tomoyuki and Utsumi, Tetsuaki and Minami, Fumihiro}, biburl = {https://www.bibsonomy.org/bibtex/299a7ece825adf3082599e61dba0bca58/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2006}, editor = {Hirose, Fumiyasu}, ee = {https://doi.org/10.1145/1118299.1118428}, interhash = {e018bc8c0de9e1b3d19f9889108c4e3e}, intrahash = {99a7ece825adf3082599e61dba0bca58}, isbn = {0-7803-9451-8}, keywords = {dblp}, pages = {533-540}, publisher = {IEEE}, timestamp = {2019-10-17T16:45:43.000+0200}, title = {Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2006.html#KitaharaHSTYUM06}, year = 2006 }