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Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems.

, , , , , , and . ASP-DAC, page 533-540. IEEE, (2006)

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Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction, , , , and . CoRR, (2007)A low-power design method using multiple supply voltages., , , , , , , , , and 3 other author(s). ISLPED, page 36-41. ACM, (1997)Gate delay estimation in STA under dynamic power supply noise., , , , and . ASP-DAC, page 775-780. IEEE, (2010)Full-Chip Analysis Method of ESD Protection Network., , and . ISQED, page 439-444. IEEE Computer Society, (2004)Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems., , , , , , and . ASP-DAC, page 533-540. IEEE, (2006)Automated low-power technique exploiting multiple supply voltages applied to a media processor., , , , , , and . IEEE J. Solid State Circuits, 33 (3): 463-472 (1998)Switching activity analysis for sequential circuits using Boolean approximation method., , , and . ISLPED, page 79-84. IEEE, (1996)A Clock-Gating Method for Low-Power LSI Design., , , , , , and . ASP-DAC, page 307-312. IEEE, (1998)A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling., , , , , , , , , and 13 other author(s). IEEE J. Solid State Circuits, 41 (1): 54-62 (2006)Switching activity analysis using Boolean approximation method., , , and . ICCAD, page 20-25. IEEE Computer Society / ACM, (1995)