%0 Conference Paper %1 conf/iscas/FrohlichSD20 %A Fröhlich, Saman %A Shirinzadeh, Saeideh %A Drechsler, Rolf %B ISCAS %D 2020 %I IEEE %K dblp %P 1-5 %T Multiply-Accumulate Enhanced BDD-Based Logic Synthesis on RRAM Crossbars. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2020.html#FrohlichSD20 %@ 978-1-7281-3320-1

@inproceedings{conf/iscas/FrohlichSD20, added-at = {2023-03-21T00:00:00.000+0100}, author = {Fröhlich, Saman and Shirinzadeh, Saeideh and Drechsler, Rolf}, biburl = {https://www.bibsonomy.org/bibtex/2197b796c8992701c715fe2ca94f34940/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2020}, ee = {https://doi.org/10.1109/ISCAS45731.2020.9180874}, interhash = {ed26dab4eca57cbd59cca5b321656da5}, intrahash = {197b796c8992701c715fe2ca94f34940}, isbn = {978-1-7281-3320-1}, keywords = {dblp}, pages = {1-5}, publisher = {IEEE}, timestamp = {2024-04-09T21:27:50.000+0200}, title = {Multiply-Accumulate Enhanced BDD-Based Logic Synthesis on RRAM Crossbars.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2020.html#FrohlichSD20}, year = 2020 }